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Advanced Power MOSFET
FEATURES
IRFM120A
BVDSS = 100 V RDS(on) = 0.2 ! ID = 2.3 A
SOT-223
2
IEEE802.3af Compatible
! Avalanche Rugged Technology ! Rugged Gate Oxide Technology ! Lower Input Capacitance ! Improved Gate Charge ! Extended Safe Operating Area ! Lower Leakage Current : 10 #A (Max.) @ VDS = 100V ! Lower RDS(ON) : 0.155 ! (Typ.)
1 3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol VDSS ID IDM VGS EAS IAR EAR dv/dt PD TJ , TSTG TL Characteristic Drain-to-Source Voltage Continuous Drain Current (TA=25%) Continuous Drain Current (TA=70%) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TA=25%) * Linear Derating Factor * Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8" from case for 5-seconds
' & & ( &
Value 100 2.3 1.84 18 "20 123 2.3 0.24 6.5 2.4 0.019 - 55 to +150
Units V A A V mJ A mJ V/ns W W/%
% 300
Thermal Resistance
Symbol R$JA Characteristic Junction-to-Ambient * Typ. -Max. 52 Units %/W
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. C
IRFM120A
Electrical Characteristics (TA=25% unless otherwise specified)
Symbol BVDSS .BV/.TJ VGS(th) IGSS Characteristic Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Min. Typ. Max. Units 100 -2.0 ---IDSS --Static Drain-Source RDS(on) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain("Miller") Charge -------------0.12 -------3.12 370 95 38 14 14 36 28 16 2.7 7.8 --4.0 100 -100 1 10 100 0.2 -480 110 45 40 40 90 70 22 --nC ns pF ) S #A V V/% V nA
N-CHANNEL POWER MOSFET
Test Condition VGS=0V,ID=250#A ID=250#A VGS=20V VGS=-20V VDS=30V VDS=100V VDS=80V,TA=125% VGS=10V,ID=1.15A VDS=40V,ID=1.15A
+ + -
See Fig 7
VDS=5V,ID=250#A
VGS=0V,VDS=25V,f =1MHz See Fig 5 VDD=50V,ID=9.2A, RG=18) See Fig 13 VDS=80V,VGS=10V, ID=9.2A See Fig 6 & Fig 12 + ,
+,
Source-Drain Diode Ratings and Characteristics
Symbol IS ISM VSD trr Qrr Characteristic Continuous Source Current Pulsed-Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
& +
Min. Typ. Max. Units --------98 0.34 2.3 18 1.5 --A V ns #C
Test Condition Integral reverse pn-diode in the MOSFET TJ=25%,IS=2.3A,VGS=0V TJ=25%,IF=9.2A diF/dt=100A/#s
+
Notes ; & Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature ' L=35mH, IAS=2.3A, VDD=25V, RG=27), Starting TJ =25% ( ISD*9.2A, di/dt*300A/#s, VDD*BVDSS , Starting TJ =25% + Pulse Test : Pulse Width = 250#s, Duty Cycle * 2% , Essentially Independent of Operating Temperature - Adjusted for Cisco
N-CHANNEL POWER MOSFET
Fig 1. Output Characteristics
VGS Top : 15V 10 V 8.0 V 7.0 V 6.0 V 5.5V 5.0 V Bottom : 4.5V
IRFM120A
Fig 2. Transfer Characteristics
ID , Drain Current [A]
ID , Drain Current [A]
11 0
11 0
1 0 oC 5 10 0 2 oC 5 @Nts: oe 1 V =0V . GS 2 V =4 V . DS 0 3 20" PleTs . 5 s us et 6 8 1 0
10 0 @Nts: oe 1 20" PleTs . 5 s us et 2 T = 2 oC .A 5 1 -1 0 10 0 11 0
- 5 oC 5 1 0
-1
2
4
VDS , Drain-Source Voltage [V]
VGS , Gate-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
04 .
Fig 4. Source-Drain Diode Forward Voltage
IDR , Reverse Drain Current [A]
RDS(on) , [ #] Drain-Source On-Resistance
03 .
V =1 V 0 GS
11 0
02 .
10 0
01 .
V =2 V 0 GS
1 0 oC 5 2 oC 5 1 -1 0 04 . 06 . 08 . 10 . 12 . 14 .
@Nt :T =2 C oe J 5 00 . 0 1 0 2 0 3 0 4 0
o
@Nts: oe 1 V =0V . GS 2 20" PleTs . 5 s us et 16 . 18 . 20 . 22 .
ID , Drain Current [A]
VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
60 0 C iss C =C +C (C =sotd) iss gs gd ds h r e C =C +C oss ds gd C =C rss gd
Fig 6. Gate Charge vs. Gate-Source Voltage
V =2 V 0 DS 1 0
VGS , Gate-Source Voltage [V]
V =5 V 0 DS V =8 V 0 DS
Capacitance [pF]
40 0 C oss
20 0
C rss
@Nts: oe 1 V =0V . GS 2 f=1Mz . H
5
@Nts:I =92A oe . D 0 0 5 1 0 1 5 2 0
00 1 0
11 0
VDS , Drain-Source Voltage [V]
QG , Total Gate Charge [nC]
IRFM120A
Fig 7. Breakdown Voltage vs. Temperature
12 . 30 .
N-CHANNEL POWER MOSFET
Fig 8. On-Resistance vs. Temperature
BVDSS , (Normalized) Drain-Source Breakdown Voltage
11 .
RDS(on) , (Normalized) Drain-Source On-Resistance
25 .
20 .
10 .
15 .
10 . @Nts: oe 1 V =1 V . GS 0 2 I =46A .D . -0 5 -5 2 0 2 5 5 0 7 5 10 0 15 2 10 5 15 7
09 .
@Nts: oe 1 V =0V . GS 2 I =20" .D 5 A -0 5 -5 2 0 2 5 5 0 7 5 10 0 15 2 10 5 15 7
05 .
08 . -5 7
00 . -5 7
TJ , Junction Temperature [oC]
TJ , Junction Temperature [oC]
Fig 9. Max. Safe Operating Area
12 0 Oeaini Ti Ae prto n hs ra i L m t d b R DS(on) s iie y 10" 0s 1m s 1m 0s 10m 0s D C @Nts: oe 1 T = 2 oC .A 5 2 T = 1 0 oC .J 5 3 Snl Ple . ige us 1 -2 -1 0 1 0 10 0 11 0 12 0 1" 0s
Fig 10. Max. Drain Current vs. Ambient Temperature
25 .
ID , Drain Current [A]
11 0
ID , Drain Current [A]
20 .
15 .
10 0
10 .
1 -1 0
05 .
00 . 2 5
5 0
7 5
10 0
15 2
10 5
VDS , Drain-Source Voltage [V]
TA , Ambient Temperature [oC]
Fig 11. Thermal Response
Thermal Response
102
D=0.5 10
1
0.2 0.1 0.05 @ Notes : 1. Z! A (t)=52 o C/W Max. J 2. Duty Factor, D=t1 /t2 3. TJ M -TA =PD M *Z! A (t) J
PDM t1 t2
Z JA (t) ,
100
0.02 0.01
!
single pulse 10- 1 10- 5 10- 4 10- 3 10- 2 10- 1 100 101
102
103
t1 , Square Wave Pulse Duration
[sec]
N-CHANNEL POWER MOSFET
Fig 12. Gate Charge Test Circuit & Waveform
IRFM120A
* Current Regulator "
50K! 12V 200nF 300nF
Same Type as DUT
VGS Qg
10V
VDS VGS DUT
3mA
Qgs
Qgd
R1
Current Sampling (IG) Resistor
R2
Current Sampling (ID) Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
RL Vout Vin RG DUT Vin 10V
td(on) t on tr td(off) t off tf 10%
Vout VDD
( 0.5 rated VDS )
90%
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
LL VDS
Vary tp to obtain required peak ID
BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD BVDSS IAS C VDD VDD
tp
ID
RG DUT 10V
tp
ID (t) VDS (t) Time
IRFM120A
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
N-CHANNEL POWER MOSFET
DUT
+ VDS --
IS L Driver RG VGS
Same Type as DUT
VGS
VDD
* dv/dt controlled by /G * IS controlled by Duty Factor 0?
VGS ( Driver )
Gate Pulse Width D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
IS ( DUT ) IRM
di/dt
Body Diode Reverse Current
VDS ( DUT )
Body Diode Recovery dv/dt
Vf
VDD
Body Diode Forward Voltage Drop
TRADEMARKS
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DISCLAIMER
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Preliminary
No Identification Needed
Full Production
Obsolete
Not In Production
Rev. I1

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